The Architecture of Computation in the low Signal-to-Noise Ratio (SNR) Régime

The analogue VLSI hardware of Spiking Neural Systems consumes up to six orders of magnitude lower power and functions below the noise floor. It uses mature bipolar semiconductor technology which is more than a quarter century old, even in its BiCMOS variant. The transistor count is less than a million transistors on chip. We are building the post-Moore's law architecture of computation which generates novelty by breaking up the Axiom of Choice by eschewing the Boolean Prime Ideal Theorem (and retaining the Krein-Milman Theorem).